GitHub - rick2047/OOCA: Object Oriented Computer Architecture. Verilog code and test benches

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
.gitignore		.gitignore
ID_stage.v		ID_stage.v
IF_stage.v		IF_stage.v
IF_stage_tb.v		IF_stage_tb.v
OOCA_top.v		OOCA_top.v
OOCA_top_tb.v		OOCA_top_tb.v
alu.v		alu.v
alu_tb.v		alu_tb.v
mips_16_defs.v		mips_16_defs.v
mmu.v		mmu.v
obj_ref.v		obj_ref.v
rom.v		rom.v
rom_tb.v		rom_tb.v