Milestone 160: Freeze fabric packet and barrier semantics (v1.0) - #16
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Copilot created this pull request from a session on behalf of
rickenator
July 5, 2026 03:37
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@copilot resolve the merge conflicts in this pull request |
# Conflicts: # ROADMAP.md # compiler/check_docs.py # docs/INDEX.md # docs/OPERATION_LOG.md # docs/PHASE2_PLAN.md
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Resolved in 9758eba. Master had already merged an independently-implemented M160 plus M161–M167 on top of it, so I merged master in and resolved the conflicts by taking master's versions (the authoritative, already-built-upon ones) for ROADMAP.md, compiler/check_docs.py, docs/INDEX.md, docs/OPERATION_LOG.md, and docs/PHASE2_PLAN.md, and removed this branch's duplicate/contradictory freeze-policy section from docs/aimu_fabric_routing.md (it disagreed with master's §16 on the M93 §8.15-4 barrier resolution). Working tree now matches origin/master exactly; build and full test suite pass. |
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Executes the next item in the Phase 2 roadmap (
docs/PHASE2_PLAN.md): Milestone 160, the fourth and final Stage 1 interface freeze required before Gate 1.Fabric freeze (
docs/aimu_fabric_routing.md)att1_fabric_send/att1_fabric_broadcast),TILE_BARRIERall-or-nothing semantics (att1_fabric_barrier_arrive), and the fabric counter name set (§6).Open question resolution
TILE_BARRIERcommand and its completion record — not a raw PCIe atomic CAS or a new dedicated register.docs/aimu_architecture.md§8.15 updated to mark the question resolved.Cross-document updates
docs/PHASE2_PLAN.md,ROADMAP.md,docs/INDEX.md: mark M160 complete and cross-reference §1.3.docs/OPERATION_LOG.md: adds the Milestone 160 entry, advances Current Milestone/Active Task to M161 (Gate 1 conformance suite).compiler/check_docs.py: bumps milestone-consistency constants to M160/M159.No C runtime, inference, CUDA, or hardware-interface behavior changes — this is a documentation/interface-freeze milestone only.