[RFC] Add instruction assembly format information#240
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patrick-rivos wants to merge 1 commit intoriscv:masterfrom
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[RFC] Add instruction assembly format information#240patrick-rivos wants to merge 1 commit intoriscv:masterfrom
patrick-rivos wants to merge 1 commit intoriscv:masterfrom
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Projects like Microprobe require a complete description of the ISA to generate valid assembly.
This RFC proposes a way to specify the assembly format of an instruction for machine consumption. This approach is inspired by Microprobe's riscv representation.
If there is an interest/desire to add this to riscv-opcodes I'd be happy to iterate on the format and contribute to adding this for all extensions.