CPU-Design

CPU implementation in VHDL Each file contains a component of the datapath The CPU design also includes the testbench to simulate the waveform included below Opcode is one of the inputs. Each opcode corresponds to a specific instruction. The file named "Registers" creates registers from R0 to R15, which are later used in the intructions. The CPU performs basic instructions such as: ADD, ADDI, SUB, SLT, OR, AND etc.