Skip to content
View spaceadler's full-sized avatar
💭
🪐🦅
💭
🪐🦅
  • Tranquility Base

Block or report spaceadler

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
spaceadler/README.md

Computer Engineering · Hardware-Software Codesign · Systems Architecture

Focus Focus Interest Approach


About

I'm a computer engineering student who's drawn to the layer where hardware physically turns into software, where a voltage on a wire becomes a bit, a bit becomes an instruction, and an instruction becomes something you can see, hear, or measure.

That thread runs through most of what ends up in this profile: designing digital logic in VHDL, writing embedded C close to the metal, and occasionally going all the way down to hand-assembling a binary file format byte by byte just to know exactly what a "player" is doing when it hits play. I've built a 16-bit CPU up from a single NAND gate, written the assembly that runs on it, and traced audio samples all the way from a sine function to the raw bytes on disk. I'd rather understand a system completely than trust an abstraction to hide it from me, which also explains why I run and maintain my own self-hosted infrastructure instead of renting someone else's.

I'm oriented towards the aerospace and real-time embedded systems industry. I treat chips and the firmware as one design problem instead of two separate ones handed off in sequence, which is why I'm into the specific niche of SoC/Systems Architecture.


Tech Stack

Hardware / Embedded

VHDL C Assembly RTOS FPGA

Systems / Infrastructure

GNU/Linux Docker Bash Tailscale Nginx

Tools

Git GHDL Vivado


Approach

Most of what's here follows the same method: start from a given first principle, a logic gate, a raw byte, a signal on a bus, and then build upward only after understanding exactly what each layer is buying you. A CPU built from a single NAND gate. A WAV file built one byte at a time instead of through a library call. A homelab built on bind-mounted directories and declarative compose files instead of opaque managed services. My goal is to earn abstractions before relying on them.


GitHub Stats

Languages


Currently Exploring

  • Real-time operating systems and firmware for resource-constrained hardware
  • Hardware-software co-design workflows, where the chip and the firmware are designed together
  • Systems and network architecture like self-hosted infrastructure, zero-trust networking, Infrastructure as Code

powered by logic, coffee, and many sleepless nights

Pinned Loading

  1. nand2tetris nand2tetris Public

    Full-stack implementation of a modern computer from first principles.

    Assembly 3

  2. spacetetris spacetetris Public

    a state-machine running tetris. platform agnostic. RTOS port coming soon.

    C

  3. UART_TX UART_TX Public

    UART Transmitter IP block written in VHDL as a gift to the wider FPGA community.

    VHDL

  4. minicoreutils minicoreutils Public

    Rewriting some coreutil commands in my quest to master systems architecture.

    C

  5. state-machine-counter state-machine-counter Public

    Hierarchical cascaded FSM VHDL design

    VHDL

  6. homelab homelab Public

    Completely self-hosted and efficient stack to take control over personal data and localize computing.

    1