Wide-Input DC–DC Power Stage (4–30 V → 12 V @ 5 A)
Designed by Suren Shirani
This repository contains the complete schematic and PCB layout for a synchronous 4-switch buck-boost DC–DC converter, designed around the Texas Instruments LM34936 controller.
The project was developed as a hardware-focused engineering exercise, emphasizing not only circuit design, but also PCB architecture, grounding strategy, and manufacturability. The goal was to design a compact, high-current converter using practices aligned with professional hardware development workflows.
| Parameter | Value |
|---|---|
| Topology | Synchronous 4-Switch Buck-Boost |
| Controller | TI LM34936 |
| Input Voltage Range | 4 V – 30 V |
| Output Voltage | 12 V (regulated) |
| Output Current | 5 A nominal (layout supports ~7–8 A) |
| Switching Frequency | ~340 kHz |
| PCB Stackup | 4-layer |
| Copper Weight | 1 oz (assumed) |
- Support wide input voltage operation where VIN may be above or below VOUT
- Maintain high efficiency through synchronous switching
- Minimize EMI through controlled current-loop geometry
- Implement a clear and intentional grounding strategy
- Produce a layout that is compact, readable, and manufacturable
The design uses a 4-layer PCB stackup, with each layer assigned a specific role:
- Layer 1 (Top):
Power components and short, high-current routing - Layer 2 (Inner 1):
Solid PGND reference plane (primary current return) - Layer 3 (Inner 2):
VIN and VOUT power planes - Layer 4 (Bottom):
Control, feedback, and sensing signals
Key layout techniques include:
- Single-point AGND–PGND connection using a NetTie near the controller
- Extensive via stitching to ensure low-impedance current return paths
- Compact switching loops to reduce parasitic inductance and EMI
- Kelvin routing for current sense signals
This project strengthened my understanding of practical hardware design beyond schematic capture, particularly in areas that are critical across many hardware domains.
-
Physical implementation matters as much as the circuit
I learned that performance, stability, and noise behavior are often dominated by PCB layout decisions rather than component selection alone. Placement, loop area, and return paths fundamentally shape system behavior. -
Ground is not a single node
Separating analog and power grounds and reconnecting them at a controlled point reinforced the idea that “ground” is a distributed network. This mindset applies broadly to mixed-signal, RF, and embedded hardware designs. -
Planes only work when intentionally used
A ground plane is not automatically beneficial unless it is actively tied into current paths. Via placement and stitching are as important as trace width when managing impedance and noise. -
Designing around current flow improves clarity
Shifting from thinking in terms of named nets to thinking in terms of closed current loops improved both my placement strategy and routing decisions. This perspective is broadly applicable to power, digital, and mixed-signal boards. -
Datasheets encode system-level assumptions
Manufacturer layout recommendations are not optional details. Following and understanding these constraints clarified how IC performance depends on the surrounding physical design. -
Professional workflows reduce mistakes
Using net classes, ERC/DRC, layered design intent, and version control reinforced how structured workflows reduce errors and make designs easier to review and iterate.
Re-evaluating design choices is a core part of professional hardware development. If iterating on this design, I would revisit the following:
-
Switch-node copper shaping
I would further refine the SW copper geometry to minimize exposed area while maintaining current capacity, potentially reducing EMI even further. -
Ground via density optimization
While sufficient via stitching is present, a second revision would allow targeted optimization based on measured current density and thermal behavior. -
Output sensing strategy
I would explore differential or remote sensing for VOUT to further reduce regulation error under high load and varying current paths. -
Thermal characterization
A follow-up revision would include thermal simulation and measured temperature rise to validate copper usage and component spacing under sustained load. -
EMI-oriented layout refinements
With hardware data, I would refine component placement and return paths to improve radiated and conducted EMI margins.
These revisions reflect how I approach hardware design as an iterative, measurement-driven process, rather than a one-pass implementation.
- KiCad (schematic capture and PCB layout)
- Texas Instruments LM34936 datasheet and application notes
- Industry-standard PCB layout practices for high-current designs
- ✔ Schematic complete
- ✔ PCB layout complete
- ⏳ Hardware validation pending
This design is provided for educational and evaluation purposes and has not yet undergone full hardware validation. Users should verify electrical, thermal, and EMI performance before deployment.
Suren Shirani
For questions, feedback, or collaboration opportunities, feel free to reach out via GitHub.