Pinned Loading

1. CNN-hw-accelerator CNN-hw-accelerator Public

   CNN hardware accelerator to accelerate quantized LeNet-5 model

   Verilog 47 7

2. IC-contest IC-contest Public

   IC-contest 2012~2024

   Verilog 25 4

3. VLSI-system-design VLSI-system-design Public

   This is an RV32I CPU design implemented in SystemVerilog, featuring an AXI bus, DMA, DRAM, and a WDT module.

   SystemVerilog 3