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1f0c578
feat: add CMake options for RISC-V and RVV1.0
suvorovrain Nov 29, 2024
de24ca6
feat: add riscv vectorization support in global values
suvorovrain Nov 29, 2024
5b0a97b
feat: add defines for RVV1.0
suvorovrain Nov 29, 2024
2b9743e
feat: add rvv function templates
suvorovrain Nov 29, 2024
3f51b1d
test: add test
suvorovrain Nov 30, 2024
487c91b
fix: add defines for RVV implementation
suvorovrain Nov 30, 2024
6069c83
feat: implement vectorized with rvv saxpy function
suvorovrain Dec 14, 2024
c9824e2
feat: correct include
suvorovrain Dec 14, 2024
7253037
feat: correct support of saxpy5 lv in factory kernels.
suvorovrain Dec 18, 2024
202f17f
fix: correct vector extension define in global structure
suvorovrain Dec 18, 2024
31cc089
fix: saxpy function with rvv
suvorovrain Dec 18, 2024
fb014b6
refactor: remove straided functions
suvorovrain Dec 27, 2024
a1237f1
fix: redundant arguments
suvorovrain Dec 30, 2024
b52cd65
refactor: remove test files
suvorovrain Jan 2, 2025
8834d86
refactor: remove debug prints
suvorovrain Jan 2, 2025
574a940
fix: codegen rvv support
suvorovrain Jan 2, 2025
bf4fb46
small refactor
suvorovrain Jan 2, 2025
60586d4
refactor: jit kernel rvv support
suvorovrain Jan 2, 2025
be0bade
refactor: new line symbol
suvorovrain Jan 2, 2025
fa3ef86
refactor: very small
suvorovrain Jan 4, 2025
382c663
feat: implement float support
suvorovrain Feb 5, 2025
4b83262
feat: implement riscv support in cpufeatures
suvorovrain Feb 8, 2025
3345b07
refactor: add new line symbol
suvorovrain Feb 9, 2025
d97ebc0
fix: update target
suvorovrain Feb 10, 2025
6d4dc1a
refactor: rename global rvv var
suvorovrain Feb 10, 2025
f1c4a25
refactor: correct CMake update
suvorovrain Feb 17, 2025
2e40e47
refactor: new line symbol
suvorovrain Feb 17, 2025
04cdb9a
refactor: correct include
suvorovrain Feb 17, 2025
4b5bbef
fix: add missing riscv defines into cpu_features
suvorovrain Feb 18, 2025
2bc7455
fix: apply new version of GB changes
suvorovrain Feb 18, 2025
ab758ff
fix: correct include + debug
suvorovrain Feb 18, 2025
9b23496
fix: cpu_features correct usage
suvorovrain Feb 19, 2025
62bf4b5
refactor: remove debug prints
suvorovrain Feb 19, 2025
fb9b7a7
refactor: comments for saxpy function
suvorovrain Feb 19, 2025
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22 changes: 22 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -162,6 +162,28 @@ if ( DEFINED GBAVX512F )
endif ( )
endif ( )

#-------------------------------------------------------------------------------
# RISC-V
#-------------------------------------------------------------------------------

if ( DEFINED GBRISCV64 )
if ( GBRISCV64 )
# default: this is detected automatically, but can be set here also
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRISCV64=1 " )
else ( )
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRISCV64=0 " )
endif ( )
endif ( )

if ( DEFINED GBRVV )
if ( GBRVV )
# default: this is detected automatically, but can be set here also
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRVV=1 " )
else ( )
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRVV=0 " )
endif ( )
endif ( )

#-------------------------------------------------------------------------------
# check compiler features
#-------------------------------------------------------------------------------
Expand Down
29 changes: 29 additions & 0 deletions FactoryKernels/GB_AxB__plus_times_fp32.c
Original file line number Diff line number Diff line change
Expand Up @@ -49,6 +49,7 @@
// special case semirings:

#define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 1
#define GB_SEMIRING_HAS_RVV_IMPLEMENTATION 1

// monoid properties:
#define GB_Z_TYPE float
Expand Down Expand Up @@ -287,6 +288,34 @@ GrB_Info GB (_Asaxpy4B__plus_times_fp32)

#endif

//----------------------------------------------------------------------
// saxpy5 method with RISC-V vectors
//---------------------------------------------------------------------

#if GB_COMPILER_SUPPORTS_RVV1

#include <riscv_vector.h>
#define VSETVL(x) __riscv_vsetvl_e32m8(x)
#define VLE(x,y) __riscv_vle32_v_f32m8(x, y)
#define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f32m8(x, y, z, w)
#define VSE(x,y,z) __riscv_vse32_v_f32m8(x, y, z)
#define VECTORTYPE vfloat32m8_t

GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
(
GrB_Matrix C,
const GrB_Matrix A,
const GrB_Matrix B,
const int ntasks,
const int nthreads,
const int64_t *B_slice
)
{
#include "mxm/template/GB_AxB_saxpy5_lv.c"
}

#endif

//----------------------------------------------------------------------
// saxpy5 method unrolled, with no vectors
//----------------------------------------------------------------------
Expand Down
29 changes: 29 additions & 0 deletions FactoryKernels/GB_AxB__plus_times_fp64.c
Original file line number Diff line number Diff line change
Expand Up @@ -49,6 +49,7 @@
// special case semirings:

#define GB_SEMIRING_HAS_AVX_IMPLEMENTATION 1
#define GB_SEMIRING_HAS_RVV_IMPLEMENTATION 1

// monoid properties:
#define GB_Z_TYPE double
Expand Down Expand Up @@ -287,6 +288,34 @@ GrB_Info GB (_Asaxpy4B__plus_times_fp64)

#endif

//----------------------------------------------------------------------
// saxpy5 method with RISC-V vectors
//----------------------------------------------------------------------

#if GB_COMPILER_SUPPORTS_RVV1

#include <riscv_vector.h>
#define VSETVL(x) __riscv_vsetvl_e64m8(x)
#define VLE(x,y) __riscv_vle64_v_f64m8(x, y)
#define VFMACC(x,y,z,w) __riscv_vfmacc_vf_f64m8(x, y, z, w)
#define VSE(x,y,z) __riscv_vse64_v_f64m8(x, y, z)
#define VECTORTYPE vfloat64m8_t

GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
(
GrB_Matrix C,
const GrB_Matrix A,
const GrB_Matrix B,
const int ntasks,
const int nthreads,
const int64_t *B_slice
)
{
#include "mxm/template/GB_AxB_saxpy5_lv.c"
}

#endif

//----------------------------------------------------------------------
// saxpy5 method unrolled, with no vectors
//----------------------------------------------------------------------
Expand Down
22 changes: 22 additions & 0 deletions GraphBLAS/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -122,6 +122,28 @@ if ( DEFINED GBAVX512F )
endif ( )
endif ( )

#-------------------------------------------------------------------------------
# RISC-V
#-------------------------------------------------------------------------------

if ( DEFINED GBRISCV64 )
if ( GBRISCV64 )
# default: this is detected automatically, but can be set here also
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRISCV64=1 " )
else ( )
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRISCV64=0 " )
endif ( )
endif ( )

if ( DEFINED GBRVV )
if ( GBRVV )
# default: this is detected automatically, but can be set here also
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRVV=1 " )
else ( )
set ( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DGBRVV=0 " )
endif ( )
endif ( )

#-------------------------------------------------------------------------------
# determine build type
#-------------------------------------------------------------------------------
Expand Down
1 change: 1 addition & 0 deletions GraphBLAS/rename/GB_rename.h
Original file line number Diff line number Diff line change
Expand Up @@ -390,6 +390,7 @@
#define GB_Global_calloc_function_set GM_Global_calloc_function_set
#define GB_Global_cpu_features_avx2 GM_Global_cpu_features_avx2
#define GB_Global_cpu_features_avx512f GM_Global_cpu_features_avx512f
#define GB_Global_cpu_features_rvv_1_0 GM_Global_cpu_features_rvv_1_0
#define GB_Global_cpu_features_query GM_Global_cpu_features_query
#define GB_Global_flush_get GM_Global_flush_get
#define GB_Global_flush_set GM_Global_flush_set
Expand Down
25 changes: 25 additions & 0 deletions Source/codegen/Generator/GB_AxB.c
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,9 @@

//------------------------------------------------------------------------------

#ifdef GBRISCV64
#include <riscv_vector.h>
#endif
#include "GB_control.h"
GB_type_enabled
#if GB_TYPE_ENABLED
Expand Down Expand Up @@ -310,6 +313,28 @@ m4_divert(if_semiring_has_avx)
}

#endif
m4_divert(if_semiring_has_rvv)
//----------------------------------------------------------------------
// saxpy5 method with RISC-V vectors
//----------------------------------------------------------------------

#if GB_COMPILER_SUPPORTS_RVV1

GB_TARGET_RVV1 static inline void GB_AxB_saxpy5_unrolled_rvv
(
GrB_Matrix C,
const GrB_Matrix A,
const GrB_Matrix B,
const int ntasks,
const int nthreads,
const int64_t *B_slice
)
{
#include "mxm/template/GB_AxB_saxpy5_lv.c"
}

#endif

m4_divert(if_saxpy5_enabled)

//----------------------------------------------------------------------
Expand Down
6 changes: 5 additions & 1 deletion Source/cpu/GB_cpu_features.h
Original file line number Diff line number Diff line change
Expand Up @@ -38,9 +38,13 @@
#include "cpu_features_macros.h"
#define STACK_LINE_READER_BUFFER_SIZE 1024
#if GBX86
// Intel x86 (also AMD): other architectures are not exploited
// Intel x86 (also AMD)
#include "cpuinfo_x86.h"
#endif
#if GBRISCV64
// RISC-V
#include "cpuinfo_riscv.h"
#endif
#endif

#endif
Expand Down
1 change: 1 addition & 0 deletions Source/cpu/GB_cpu_features_impl.c
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@
#include "src/impl_x86_freebsd.c"
#include "src/impl_x86_linux_or_android.c"
#include "src/impl_x86_windows.c"
#include "src/impl_riscv_linux.c"
#if GBX86
#if (defined(__apple__) || defined(__APPLE__) || defined(__MACH__))
// needed for src/impl_x86_macos.c:
Expand Down
41 changes: 40 additions & 1 deletion Source/global/GB_Global.c
Original file line number Diff line number Diff line change
Expand Up @@ -133,6 +133,7 @@ typedef struct

bool cpu_features_avx2 ; // x86_64 with AVX2
bool cpu_features_avx512f ; // x86_64 with AVX512f
bool cpu_features_rvv_1_0 ; // RISC-V with RVV1.0

//--------------------------------------------------------------------------
// integer control
Expand Down Expand Up @@ -226,6 +227,7 @@ static GB_Global_struct GB_Global =
// CPU features
.cpu_features_avx2 = false, // x86_64 with AVX2
.cpu_features_avx512f = false, // x86_64 with AVX512f
.cpu_features_rvv_1_0 = false, // RISC-V with RVV1.0

// integer control
.p_control = (int8_t) 32,
Expand Down Expand Up @@ -356,16 +358,48 @@ void GB_Global_cpu_features_query (void)
}
#endif

}
#elif GBRISCV64
{

//----------------------------------------------------------------------
// RISC-V architecture: see if RVV1.0 is supported
//----------------------------------------------------------------------

#if !defined ( GBNCPUFEAT )
{
// Google's cpu_features package is available: use run-time tests
RiscvFeatures features = GetRiscvInfo ().features ;
GB_Global.cpu_features_rvv_1_0 = (bool) (features.V) ;

}
#else
{
#if defined ( GBRVV )
{
// the build system asserts whether or not RVV1.0 is available
GB_Global.cpu_features_rvv_1_0 = (bool) (GBRVV) ;
}
#else
{
// RVV1.0 not available
GB_Global.cpu_features_rvv_1_0 = false ;
}
#endif
}
#endif

}
#else
{

//----------------------------------------------------------------------
// not on the x86_64 architecture, so no AVX2 or AVX512F acceleration
// not on the x86_64 or RISC-V architecture, so no AVX2, AVX512F or RVV1.0 acceleration
//----------------------------------------------------------------------

GB_Global.cpu_features_avx2 = false ;
GB_Global.cpu_features_avx512f = false ;
GB_Global.cpu_features_rvv_1_0 = false ;

}
#endif
Expand All @@ -381,6 +415,11 @@ bool GB_Global_cpu_features_avx512f (void)
return (GB_Global.cpu_features_avx512f) ;
}

bool GB_Global_cpu_features_rvv_1_0 (void)
{
return (GB_Global.cpu_features_rvv_1_0) ;
}

//------------------------------------------------------------------------------
// hyper_switch
//------------------------------------------------------------------------------
Expand Down
1 change: 1 addition & 0 deletions Source/global/GB_Global.h
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@
void GB_Global_cpu_features_query (void) ;
bool GB_Global_cpu_features_avx2 (void) ;
bool GB_Global_cpu_features_avx512f (void) ;
bool GB_Global_cpu_features_rvv_1_0 (void) ;

void GB_Global_mode_set (int mode) ;
int GB_Global_mode_get (void) ;
Expand Down
35 changes: 35 additions & 0 deletions Source/include/GB_compiler.h
Original file line number Diff line number Diff line change
Expand Up @@ -245,6 +245,16 @@

#endif

#if !defined ( GBRISCV64 )

#if defined(__riscv)
#define GBRISCV64 1
#else
#define GBRISCV64 0
#endif

#endif

//------------------------------------------------------------------------------
// AVX2 and AVX512F support for the x86_64 architecture
//------------------------------------------------------------------------------
Expand Down Expand Up @@ -306,6 +316,31 @@
#define GB_TARGET_AVX2
#endif

//------------------------------------------------------------------------------
// RVV1.0 support for the RISC-V architecture
//------------------------------------------------------------------------------

#if GBRISCV64
#if GB_COMPILER_GCC
// TODO: add other compilers
#if __GNUC__ >= 13
#define GB_COMPILER_SUPPORTS_RVV1 1
#else
#define GB_COMPILER_SUPPORTS_RVV1 0
#endif
#endif
#else
// non-RISC-V architecture
#define GB_COMPILER_SUPPORTS_RVV1 0
#endif

// prefix for function with target rvv1.0
#if GB_COMPILER_SUPPORTS_RVV1
#define GB_TARGET_RVV1 __attribute__ ((target ("arch=rv64gcv")))
#else
#define GB_TARGET_RVV1
#endif

//------------------------------------------------------------------------------
// disable Google's cpu_featgures on some compilers
//------------------------------------------------------------------------------
Expand Down
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