[rollout, vllm] fix: avoid SIGSEGV on ROCm TP=1 by conditionally omitting distributed_executor_backend#6459

HeShiLie wants to merge 2 commits into

verl-project:mainverl-project/verl:mainfrom

HeShiLie:fix/rocm-asyncllm-sigsegvHeShiLie/verl-videotir:fix/rocm-asyncllm-sigsegvCopy head branch name to clipboard