[Kernel] OAITritonExperts MXFP4: include SM 12.x in supported device range by tonyliu312 · Pull Request #41028 · vllm-project/vllm

tonyliu312 · 2026-04-27T15:57:21Z

Summary

The OAI Triton MXFP4 device gate — _triton_kernel_moe_supports_current_device(), shared by BaseOAITritonExperts and OAITritonMxfp4ExpertsMonolithic — caps CUDA capability at < (11, 0):

# covers CUDA SM90 (Hopper) and SM100+ (datacenter Blackwell)
return cap is not None and (9, 0) <= (cap.major, cap.minor) < (11, 0)

That excludes consumer Blackwell — SM 12.0 / SM 12.1 (RTX 50-series and GB10 / DGX Spark) — even though those parts execute the same Triton MXFP4 kernels just fine. On SM 12.x today the engine fails to start with:

ValueError: Mxfp4 MoE backend 'TRITON' does not support the
deployment configuration since kernel does not support current
device cuda.

This bumps the upper bound to < (13, 0), which lets SM 100 / 103 / 120 / 121 all reach the Triton path. The kernels are pure Triton JIT — no SM 9.0-only wgmma or SM 10.x-only tcgen05.* instructions — so the wider gate is safe.

(Rebased on main: the per-class capability checks were consolidated into the shared _triton_kernel_moe_supports_current_device() helper since this PR was first opened, so the bound now moves in a single place instead of the two inline call sites.)

Test plan

Verified locally on dual NVIDIA GB10 / SM 12.1 (DGX Spark): _triton_kernel_moe_supports_current_device() returns True after the bump and engine init progresses past this gate.
No PTX or kernel changes — only the runtime gate moves; existing CI on SM 90 (H100) / SM 100 covers the unchanged paths.
Subsequent failures observed on SM 12.x for some workloads (e.g. SILU activation on OAITritonExperts, which only supports SwiGLU) are model-specific and unrelated to this gate — they manifest as proper kernel does not support … errors after this PR, instead of being masked behind the device-capability gate.

Cross-platform notes

Platform	Pre-PR	Post-PR
SM 80 / SM 86 / SM 89 (Ampere/Ada)	❌ rejected (correct, kernels don't target Ampere)	❌ rejected (unchanged)
SM 90 (Hopper)	✅ accepted	✅ accepted
SM 100 / 103 (datacenter Blackwell)	✅ accepted	✅ accepted
SM 120 / 121 (consumer Blackwell)	❌ rejected	✅ accepted
ROCm gfx942 / gfx950	✅ accepted	✅ accepted
Other archs ≥ (13,0)	❌ rejected	❌ rejected (intentional — re-evaluate when those ship)

cc @mgoin @tlrmchlsmth @LucasWilkinson — small follow-up to the SM 12.x story alongside #40923.

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github-actions · 2026-04-27T15:58:03Z

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Code Review

This pull request expands the device capability checks to support Blackwell architecture (SM 100+, SM 120/121) and ROCm gfx942/950 by increasing the upper bound to SM 13.0. The review feedback identifies an inconsistency in the documentation comments which incorrectly state support for SM 8.0+, whereas the implementation correctly restricts it to SM 9.0+.

gemini-code-assist · 2026-04-27T15:59:10Z

+        # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter
+        # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10
+        # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton
+        # MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton
+        # backend supports; the upper bound just excludes archs where the
+        # comment-author was not yet sure.


The comment added here is inconsistent with the code logic and the PR's stated intent. It mentions that the kernels run on any sm>=80, but the code enforces sm>=90 (via (9, 0) <= ...). The PR description also explicitly states that SM 8x (Ampere) is rejected because the kernels do not target it. The comment should be updated to sm>=90 to be consistent with the implementation.

Suggested change

# (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter

# Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10

# /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton

# MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton

# backend supports; the upper bound just excludes archs where the

# comment-author was not yet sure.

# (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter

# Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10

# /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton

# MXFP4 kernels are JIT-compiled and run on any sm>=90 the Triton

# backend supports; the upper bound just excludes archs where the

# comment-author was not yet sure.

gemini-code-assist · 2026-04-27T15:59:10Z

+        # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter
+        # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10
+        # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton
+        # MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton
+        # backend supports; the upper bound just excludes archs where the
+        # comment-author was not yet sure.


The comment added here is inconsistent with the code logic and the PR's stated intent. It mentions that the kernels run on any sm>=80, but the code enforces sm>=90 (via (9, 0) <= ...). The PR description also explicitly states that SM 8x (Ampere) is rejected because the kernels do not target it. The comment should be updated to sm>=90 to be consistent with the implementation.

Suggested change

# (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter

# Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10

# /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton

# MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton

# backend supports; the upper bound just excludes archs where the

# comment-author was not yet sure.

# (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter

# Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10

# /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton

# MXFP4 kernels are JIT-compiled and run on any sm>=90 the Triton

# backend supports; the upper bound just excludes archs where the

# comment-author was not yet sure.

tonyliu312 · 2026-04-27T16:01:57Z

Thanks @gemini-code-assist — fixed in f1672af. The comment now correctly explains the lower bound (SM 9.0+ for Triton MXFP4 tensor-core/matmul instructions) without misleading "sm>=80" wording.

gemini-code-assist · 2026-04-27T16:02:13Z

Thank you for the update, @tonyliu312. The clarification in the code comments regarding the lower bound is helpful for maintainability. Since the logic changes have been verified on SM 12.x hardware and the gate correctly allows the intended devices while maintaining the necessary constraints for the Triton MXFP4 kernels, this looks good.

AshtonVaughan · 2026-04-30T09:19:28Z

Validated the gate logic on RTX 5090 (consumer Blackwell SM 12.0). Author tested SM 12.1 GB10/DGX Spark, this adds the SM 12.0 RTX 50-series side.

SM version reported by torch.cuda: 12.0
Old gate (< 11,0):  False  (5090 incorrectly excluded)
New gate (< 13,0):  True   (5090 admitted)

Sanity sweep across SM caps:

SM	old gate	new gate	comment
8.0	False	False	correct, pre-Hopper
9.0	True	True	Hopper kept
10.0	True	True	datacenter Blackwell kept
12.0	False	True	RTX 5090 fix
12.1	False	True	GB10 fix (already verified by author)
13.0	False	False	future arch correctly excluded

One minor note. The comment block now reads SM 100+ (datacenter Blackwell), SM 120/SM 121 (consumer Blackwell) but the literal upper bound < (13, 0) also admits hypothetical SM 11.x. NVIDIA has not announced anything in that range so it is academic, but if you want the comment to match the gate exactly you could note that SM 11.x is also nominally accepted.

LGTM on the gate change itself. The Triton MXFP4 kernels are pure JIT and the consumer Blackwell tensor cores are a strict superset of the SM 9.0 instructions they rely on, so the wider gate is safe in practice.

…range Bump the CUDA capability upper bound from < (11, 0) to < (13, 0) in BaseOAITritonExperts and OAITritonMxfp4ExpertsMonolithic so that consumer Blackwell (SM 12.0 / SM 12.1) can reach the Triton MXFP4 path. The Triton kernels themselves compile and run fine on SM 12.x — they are pure JIT and don't use SM 9.0-only wgmma or SM 10.x-only tcgen05.* instructions. Refs: vllm-project#41028 Co-authored-by: tonyliu312

mergify · 2026-05-23T09:31:41Z

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @tonyliu312.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

…kwell Two parallel device-capability gates currently exclude SM 12.x (consumer Blackwell — RTX 50-series and GB10 / DGX Spark) from the DeepGEMM-backed MXFP4 MoE path: 1. `CudaPlatformBase.support_deep_gemm()` only accepts SM 90 (Hopper) and SM 100+ family (datacenter Blackwell), so `is_deep_gemm_supported()` returns False on SM 120/121. 2. `DeepGemmFP4Experts._supports_current_device()` further requires `is_device_capability_family(100)`, so even with the platform gate relaxed it still rejects SM 12.x. Hardware reality: SM 120 / SM 121 use the same MMA family as datacenter Blackwell for FP4 / FP8 matmuls (SM 10.x uses `tcgen05.*`, SM 12.x uses `mma.*`, but at the Python-level dispatch they share the DeepGEMM MoE oracle). For kernels DeepGEMM (or its forks like jasl/DeepGEMM with SM 120 native ports) compile for SM 12.x, the wrappers should accept the device. This PR widens both gates to also accept `is_device_capability_family(120)`, matching the comment intent in `support_deep_gemm` ("Hopper and Blackwell GPUs are supported"). The kernel-level fallback to `tcgen05.*` is still guarded by DeepGEMM's own dispatch, which now has paths for SM 12.x in recent forks. Verified locally on dual NVIDIA GB10 / SM 121 (DGX Spark): with this change `is_deep_gemm_supported() == True` and `DeepGemmFP4Experts. _supports_current_device() == True`. (Boot still requires DeepGEMM itself to provide SM 12.x kernels for the specific operations the deployment uses, which is independent of these vLLM-side gates.) Companion to vllm-project#41028 (Triton MXFP4 SM 12.x device-range fix) and vllm-project#40923 (Marlin SM 12.x cubin). Signed-off-by: Tony Liu <tonyliu0512@gmail.com>

…range The Triton MXFP4 fused-MoE experts (`OAITritonExperts` and `OAITritonMxfp4ExpertsMonolithic`) gate by return (9, 0) <= (cap.major, cap.minor) < (11, 0) so consumer Blackwell (SM 12.0 / SM 12.1, RTX 50-series and GB10/DGX Spark) is rejected at runtime with ValueError: Mxfp4 MoE backend 'TRITON' does not support the deployment configuration since kernel does not support current device cuda. The Triton kernels themselves compile and run fine on SM 12.x — they are pure JIT and don't use SM 9.0-only `wgmma` or SM 10.x-only `tcgen05.*` instructions. The upper bound just predates the SM 12.x Blackwell variants shipping. Bumping the bound to `(13, 0)` lets SM 100/103/120/121 all use this path, matching the existing SM 100+ Blackwell intent stated in the comment. Verified locally on dual NVIDIA GB10 (DGX Spark, SM 12.1): - `_supports_current_device()` returns True after the bump - Engine init progresses past the previous gate (subsequent failures, if any, are model-specific and unrelated to this gate, e.g. SILU vs SwiGLU activation requirement of `OAITritonExperts`). Same change applied to both occurrences in this file (line 658 for the fused experts, line 1072 for the monolithic experts). Signed-off-by: Tony Liu <tonyliu0512@gmail.com>

Harry-Chen · 2026-05-30T05:06:02Z

@khluu we have DGX Spark devices in CI available right? Maybe we are able to add tests to SM12x kernels afterwards?

tonyliu312 requested review from mgoin and pavanimajety as code owners April 27, 2026 15:57

claude Bot reviewed Apr 27, 2026

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mergify Bot added the gpt-oss Related to GPT-OSS models label Apr 27, 2026

github-project-automation Bot added this to gpt-oss Issues & Enhancements Apr 27, 2026

github-project-automation Bot moved this to To Triage in gpt-oss Issues & Enhancements Apr 27, 2026

gemini-code-assist Bot reviewed Apr 27, 2026

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tonyliu312 force-pushed the oai-triton-sm12x-gate branch from bec9ac4 to f1672af Compare April 27, 2026 16:01

This was referenced Apr 27, 2026

[Hardware] DeepGEMM MoE: extend device gates to SM 12.x consumer Blackwell #41062

Open

[Tracking] DeepGEMM SM 12.x kernel coverage gaps for DeepSeek-V4-Flash on consumer Blackwell (RTX 50 / GB10) #41063

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Harry-Chen approved these changes Apr 28, 2026

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Harry-Chen added the ready ONLY add when PR is ready to merge/full CI is needed label Apr 28, 2026

AshtonVaughan mentioned this pull request Apr 30, 2026

[CI Failure]: Qwen3.6-35B-A3B-FP8 fails on NVIDIA GB10 with cutlass_scaled_mm / cutlass_gemm_caller Error Internal under vLLM nightly + CUDA 13.0 #40758

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vbalko-claimate mentioned this pull request May 1, 2026

[Bug]: Triton MXFP4 MoE kernel uses .tile::scatter4 PTX (Hopper/SM10 only) — fails on SM 12.1 (GB10/DGX Spark); Marlin fallback hits #37030 #41477

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mergify Bot added the needs-rebase label May 23, 2026

tonyliu312 force-pushed the oai-triton-sm12x-gate branch from f1672af to 77eba0c Compare May 23, 2026 09:42

tonyliu312 requested a review from zyongye as a code owner May 23, 2026 09:42

mergify Bot removed the needs-rebase label May 23, 2026

tonyliu312 force-pushed the oai-triton-sm12x-gate branch from 77eba0c to 87ac992 Compare May 25, 2026 08:29

tonyliu312 force-pushed the oai-triton-sm12x-gate branch from 87ac992 to 581060b Compare May 30, 2026 02:53

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[Kernel] OAITritonExperts MXFP4: include SM 12.x in supported device range#41028

[Kernel] OAITritonExperts MXFP4: include SM 12.x in supported device range#41028
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