fix(matmul): reject non-positive --tile in Config (#80)#110
fix(matmul): reject non-positive --tile in Config (#80)#110philluiz2323 wants to merge 1 commit into
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A negative or zero tile passed the truthy check in gemm.multiply and reached _gemm_tiled_sync, where _tiles(n, T) with T <= 0 yields an empty schedule: range(0, n, T) is empty. The tiled loop then never runs and C (allocated with np.empty) is returned uninitialised — silent corruption of the exact engine's ground truth. Reject tile < 1 in Config.__post_init__, mirroring the existing dtype / vram_fraction / storage validation; None still means auto-pick T. Add CPU-only tests covering the rejected and accepted cases. Fixes zeokin#80
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Added a filled-in reference-regime scorecard from To set expectations honestly: this is an input-validation fix in GPU gates: |
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Gate chain passed. This PR is queued for the next batched GPU evaluation window. |
Fixes #80.
Summary
Config.__post_init__validateddtype,vram_fractionandstorage, but nottile. A non-positive--tile(e.g.-5) therefore passed the truthy check ingemm.multiply—T = cfg.tile or auto_tile(...)— and reached_gemm_tiled_sync. There_tiles(n, T)withT <= 0yields an empty schedule, becauserange(0, n, T)is empty for a non-positive step:With no tiles, the
(i, j, k)accumulation loop never runs andC— allocated withnp.emptyinstorage.allocate— is returned uninitialised. That is silent data corruption of the exact engine that every strategy is scored against, i.e. the ground truth CCO promises.(
tile=0was already masked to auto-pick by theor, but is equally invalid and is now rejected too.)Fix
tile < 1inConfig.__post_init__, mirroring the existingdtype/vram_fraction/storagevalidation.Nonestill means "auto-pickTfrom free VRAM".0,-1,-5) and accepted (None,256) cases intests/test_auto_tile_budget.py.Failure now surfaces immediately at construction instead of corrupting results:
Scope note
This is an input-validation correctness fix in
matmul/config.py. It adds no strategy/transform and changes no scored code path, so there is no accuracy/latency improvement to claim. The scorecard below is the unchanged baseline on the reference regime, included per CONTRIBUTING to show the eval pipeline runs green with this branch.Result (N=12000, full-rank, fp32, RTX 4090 (24 GB); baseline — no strategy added)
rsvdon full-rank — unchanged baseline; below the 0.8 floor, gated to 0 as usual)O(N^3), smartO(N^2·M)— unchangedrsvd) vs 644.46 ms exact — unchanged baselinersvd) vs 1658.13 MiB exact — unchanged baselineHuman-readable scorecard —
python -m eval --n 12000 --pairs 3on RTX 4090, fp32Reference regime is A100 (80 GB) per CONTRIBUTING; measured here on an RTX 4090 (24 GB) — device named so numbers are reproducible.
Checklist
state honestly which axis it trades. Correctness fix: rejects an input that silently returns uninitialised results; no cost axis changes and no accuracy is traded.
Test plan (run on RTX 4090)
python tests/test_auto_tile_budget.py— 5/5, incl. newtest_config_rejects_non_positive_tile(0,-1,-5raise) andtest_config_accepts_positive_tile_and_none(None,256construct)python eval/tests/test_eval.py— 16/16 passpython strategy/tests/test_subspace.py— 12/12 passpython tests/test_correctness.py— 7/8 pass. The one failure,test_fp16_incore_tiled_parity, is pre-existing and unrelated to this change: it also fails on cleanzeokin:mainon the same GPU, and this PR does not touch the fp16 in-core/tiled paths it exercises.<----ia--------e------- relabel refresh: 2026-07-07T14:23:28Z -->