fix(boards): correct the F412 chip selection and app flash size on ARK cannodes

boards/ark/can-flow-mr/nuttx-config/canbootloader/defconfig

@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y

boards/ark/can-flow-mr/nuttx-config/nsh/defconfig

@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412VG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y

boards/ark/can-flow-mr/nuttx-config/scripts/canbootloader_script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-flow-mr/nuttx-config/scripts/script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 1M of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412VG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-flow/nuttx-config/scripts/canbootloader_script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-flow/nuttx-config/scripts/script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08010000, LENGTH = 448K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-gps/nuttx-config/include/board.h

@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1

boards/ark/can-gps/nuttx-config/scripts/canbootloader_script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-gps/nuttx-config/scripts/script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08010000, LENGTH = 448K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-rtk-gps/nuttx-config/include/board.h

@@ -141,8 +141,8 @@
 #define GPIO_I2C2_SCL	GPIO_I2C2_SCL_1
 #define GPIO_I2C2_SDA	GPIO_I2C2_SDA_4
 
-#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
-#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN10)
+#define GPIO_I2C2_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 /* SPI */
 #define GPIO_SPI1_MISO  GPIO_SPI1_MISO_1

boards/ark/can-rtk-gps/nuttx-config/scripts/canbootloader_script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-rtk-gps/nuttx-config/scripts/script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CE has 512Kb of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08010000, LENGTH = 448K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/can-rtk-gps/src/board_config.h

@@ -82,9 +82,6 @@
 #define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
 #define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
 
-#define GPIO_I2C2_SCL_RESET   /* PB10 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN10)
-#define GPIO_I2C2_SDA_RESET   /* PB9  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
-
 #define GPIO_USART1_RX_GPIO	(GPIO_INPUT|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3)
 #define GPIO_USART1_TX_GPIO	(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15)
 

boards/ark/cannode/nuttx-config/canbootloader/defconfig

@@ -16,7 +16,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412CG=y
 CONFIG_ARCH_INTERRUPTSTACK=4096
 CONFIG_ARMV7M_MEMCPY=y
 CONFIG_BOARDCTL=y

boards/ark/cannode/nuttx-config/include/board.h

@@ -144,6 +144,6 @@
 #define GPIO_I2C1_SDA	GPIO_I2C1_SDA_2
 
 #define GPIO_I2C1_SCL_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN6)
-#define GPIO_I2C1_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN7)
+#define GPIO_I2C1_SDA_GPIO                  (GPIO_OUTPUT | GPIO_OPENDRAIN |GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN9)
 
 #endif /* __ARCH_BOARD_BOARD_H */

boards/ark/cannode/nuttx-config/nsh/defconfig

@@ -57,7 +57,7 @@ CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y
 CONFIG_ARCH_BOARD_CUSTOM_NAME="px4"
 CONFIG_ARCH_CHIP="stm32"
 CONFIG_ARCH_CHIP_STM32=y
-CONFIG_ARCH_CHIP_STM32F412CE=y
+CONFIG_ARCH_CHIP_STM32F412CG=y
 CONFIG_ARCH_INTERRUPTSTACK=768
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARMV7M_MEMCPY=y

boards/ark/cannode/nuttx-config/scripts/canbootloader_script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412 has 512Kb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
     flash (rx)   : ORIGIN = 0x08000000, LENGTH = 32K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/cannode/nuttx-config/scripts/script.ld

@@ -33,25 +33,21 @@
  *
  ****************************************************************************/
 
-/* The STM32F412CG has 1Mb of FLASH beginning at address 0x0800:0000 and
- * 256Kb of SRAM. SRAM is split up into three blocks:
- *
- * 1) 112Kb of SRAM beginning at address 0x2000:0000
- * 2)  16Kb of SRAM beginning at address 0x2001:c000
- * 3)  64Kb of SRAM beginning at address 0x2002:0000
- * 4)  64Kb of TCM SRAM beginning at address 0x1000:0000
+/* The STM32F412CG has 1MB of FLASH beginning at address 0x0800:0000 and one
+ * contiguous 256Kb block of SRAM beginning at address 0x2000:0000.
  *
  * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
  * where the code expects to begin execution by jumping to the entry point in
  * the 0x0800:0000 address range.
  *
- * The first 0x10000 of flash is reserved for the bootloader.
+ * The first 0x10000 of flash is reserved for the bootloader (32K) and
+ * flash-backed parameters (32K).
  */
 
 MEMORY
 {
-    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 928K
-    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 192K
+    flash (rx)   : ORIGIN = 0x08010000, LENGTH = 960K
+    sram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
 }
 
 OUTPUT_ARCH(arm)

boards/ark/cannode/src/board_config.h

@@ -50,9 +50,6 @@
 #define GPIO_CAN1_TERMINATION /* PC15 */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN15)
 #define GPIO_CAN_TERM                    GPIO_CAN1_TERMINATION
 
-/* Boot config */
-#define GPIO_BOOT_CONFIG      /* PH1 */ (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTH|GPIO_PIN1|GPIO_EXTI)
-
 /* ICM42688p FSYNC */
 #define GPIO_42688P_FSYNC     /* PB8  */  (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)