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The register-file generator moves into OpenROAD, a sibling of generate_ram_netlist in src/ram: `generate_regfile -spec <file> [-verilog] [-def] [-lef] [-liberty] [-check_ports <rtl.v>]` builds the spec's register file into the current database, after read_lef as usual, and writes the views asked for. The code is structured_gen's, in the ram namespace, its exceptions reported as RAM-0050; Bazel and CMake both list the new sources. Not upstreamed. tools/structured_gen:golden_test proves the move: for five tiny synthetic specs covering every spec feature (banks, bank columns, bit folds, registered read with the RTL's names, banked and interleaved reads, the zero word, netlist mode), the command and the tool write the same Verilog, DEF, abstract LEF and model liberty, byte for byte, in seconds. golden_xiangshan_test does the same for the ten specs the flow uses, at real size (manual: minutes per spec). The tool stays until its callers move to the command. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
…ons land In netlist mode the block's abstract is what a parent's macro placer sees before the block dissolves into its rows, and the placer orients a macro by flipping it to shorten the wires to its pins. Edge pins packed in a corner said nothing about where the wires go: each port's pin now sits at the centroid of the cells on its net -- a write data bit over its column's write muxes, a read data bit at its bitline's root, an address among its inverters and decode. They are never routed; the block dissolves first. Same edit in the tool and in patch 0010, so the golden test stays byte for byte. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
…regression test Three things the first designs beyond XiangShan's turned up, in the tool and in patch 0010 alike, so the golden test stays byte for byte: - A netlist-mode abstract's pins sit at the centroid of their connections; off the M4 track grid, rtl_macro_placer refused the macro (MPL-0005). They are snapped as the edge pins are. - The port check read one port per line and missed `input [4:0] ra1, ra2, wa3`, riscv32i's register file. It reads the header per comma entry, a bare name inheriting the direction and width before it. - The views and the log name the command, not the tool it came from. Patch 0010 gains src/ram/test/generate_regfile_asap7: an 8 x 4, two- bank, 2R2W file with word 0 reading zero, checked against RTL that declares its ports several to a line, its four views against golden files. OpenROAD's test targets do not analyse from bazel-orfs (they need OpenROAD's dev-only repositories); run by hand, the log matches .ok and the four views their golden files. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Two commits added, same edit in the tool and in patch 0010 so the golden test stays byte for byte:
The ORFS side that uses this, replacing STRUCTURED_*, is stacked on this branch: see the next PR. |
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The stacked PR is #1187. |
clang-format in OpenROAD's style, SPDX headers on the new sources, the command and its spec documented in src/ram/README.md, and the commit message written for upstream. The binary does not change: the golden test and the ORFS register-file tests pass from cache. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Phase A of moving register-file generation into ORFS and OpenROAD: the generator becomes an OpenROAD command, carried here as a patch, and is proven byte-identical to the tool it replaces. Nothing calls it yet, so no flow output changes. Phase B (register files through
AUTO_MEMORIES, as macros that dissolve after macro placement) builds on it.The command
Carried patch
0010-openroad-ram-generate-regfile.patch, in OpenROAD'ssrc/ram, next togenerate_ram_netlist:tools/structured_gen's, moved: theregfileandviewssources, in theramnamespace, with exceptions reported asRAM-0050and a missing-specasRAM-0051.Proof: byte for byte
tools/structured_gen/golden_test.shruns each spec through the tool and the command from the same LEFs, then requires an identical Verilog netlist, DEF, abstract LEF, model liberty and pre-layout liberty.golden_test(default)golden_xiangshan_test(manual)The tiny specs, in
tools/structured_gen/golden/, are also a fast test case to keep for the phases that follow.Cost
The
openroadbinary changes, so every ORFS stage re-runs once. Building it here was 19 local actions (theramsources and the link) on top of the remote cache.Next
AUTO_MEMORIESregister files, named explicitly asSTRUCTURED_MEMORIESdoes today (parity first), placed as macros, then dissolved into a FIRM core plus a periphery for OpenROAD. It retires ORFS patches 0071, 0078, 0082 and 0084, and the tool itself.🤖 Generated with Claude Code