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rf-dsp

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bazx-bit / caravel-direct-rf

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Cognitive Direct-RF Sampling Transceiver: Massively pipelined SDR DSP baseband engine hardened on SkyWater 130nm for Efabless Caravel OpenMPW tapeout. 100-phase SystemVerilog RTL, OpenLane ASIC signoff, and 100% regression verified.

asic dsp sdr fft transceiver systemverilog digital-signal-processing viterbi caravel wishbone qam hardware-verification tapeout efabless openlane open-source-silicon skywater130 rf-dsp
  • Updated Oct 11, 2026
  • Verilog

IsaacKosloski / pa-studio

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An end-to-end software/hardware co-design framework for Power Amplifier (PA) modeling and Digital Predistortion (DPD), bridging deep learning, DSP, web/desktop APIs, and FPGA/MCU acceleration.

react fpga vhdl pytorch systemverilog rf system-identification embedded-c vhdl-code embedded-controller 6g power-amplifier embedded-cpp fastapi digital-predistortion system-identification-toolbox 6g-research 6g-networks rf-dsp
  • Updated Oct 8, 2026
  • Python

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