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This project aims to implement a frame buffer on an FPGA to allow some simple image processing and editing. The goal of this project was to create a system capable of passing out a video signal while overlaying an arbitrary shape on the image. In this project a gray square is used as an arbitrary element to add to the image. Eventually this frame buffer will be used to in my senior design class (ECE448/449) to preform character detection in hardware.
The Reference_and_Sample_code/ directory contains the example files provided with the Altera DE2-115. These files implement much of the input video decoding. The Altera_Mega_Funtions/ directory contains the on-chip rams generated by Quartus for the DE2-115. The Added_Value/ directory contains my original verilog code and modified example files.